By the Internet's popularization, the data traffic rapidly increases recently. In order to deal with the increase, enlargement of capacity of a communication channel, speedup and enlargement of capacity of a communication device, such as an exchange node, is important.
A conventional variable length packet communication device has structure that interfaces and a microprocessor are connected to a bus. When a packet arrives at one of the interfaces, the interface transmits the packet to the microprocessor and the microprocessor analyzes the packet and transmits the packet to the desirable route. However, the bus and microprocessor are the bottleneck to perform a processing at high speed.
It is also used a switching device that performs the switching in packet units, like a frame relay. The device assigns and releases switch resources in variable length packet units. In the device, however, it is necessary to monitor the packet transmission completion in byte units, and to control the assignment in byte units. Therefore, since the control processing is a bottleneck, it is hard to construct a large capacity packet switch.
It also appeared a relatively high speed packet communication device that used as the switch core, a switch like what it is disclosed in “The Tiny Tera: A Packet Switch Core,” IEEE Micro, Vol. 17, No. 1, 1997, pp. 26-33 (Reference (1)). Reference (1) disclose that the input interface divides the packet into fixed length cells and transmits the cells to the core switch. The core switch transmits the cells to a desirable route, and the output interface for output reassembles the cells into the packets.
Japanese Unexamined Patent Publication Disclosure 5 (1993)-227211 (Reference (2)) discloses a technique for dividing the variable length packet into a plurality of small packets, adding the internal header for indicating the destination to each of the small packets and after that transmitting the small packets to the switch. The switch performs ATM (asynchronous transfer mode) switching to the small packets based on the internal header. After that, in output side, the small packets are assembled into the variable length packet. A path is set up between the source channel and the destination channel through the switch. While a packet is transmitted through the path, the path is fixed and transmission from another channel holds being waited.
Japanese Unexamined Patent Publication Disclosure 8 (1996)-65307 (Reference (3)) discloses a technique for generating switching information from destination information included in packets and sending them to the switch. The switch performs switching based on the switching information. The packet assembling part converts sent information to packets, attribute information indicating the lead packet and destination information in the case of the first packet, but attribute information indicating the packets other than the first packet in the case of following packets.